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Model 2650P PCI 32Mbit Multi-Channel Bit Synchronizer

Product Support

 

  • Up to 24* independent 32 Mbit Bit Synchronizers per chassis

  • Tunable data rates of 8 Hz to 32 MHz for NRZ codes, 8 Hz to 16 MHz for all others

  • User selectable inputs and outputs

  • Processes all IRIG standard and randomized codes

  • Programmable loop bandwidth control

  • Bit error performance within 1dB of theoretical

  •  Independent PCM encoders

  • Page lock per bit sync for control

  • Automatic sensing of all bit syncs in chassis

  • Configured via GUI, Network, RS232

  • Virtually unlimited configuration storage on hard drive

  • Dual Hot-swappable Redundant Power Supplies

 

System Manual

Datasheet

Technical Specs

Rear Panel I/O

Software & Drivers

User\Program Manual

Overview

 

The Model 2650P Multi-Channel Bit Synchronizer consists of up to twenty-four*  32 Mbit PCM Bit Synchronizers in a single PCI based chassis. The chassis includes a 12” flat panel display and retractable keyboard for fast and easy viewing of all setup parameters and status. Each bit synchronizer is configured independently from a simple to use GUI. The system includes dual hot-swappable redundant power supplies to minimize the loss of mission critical data.

At the heart of the Multi-channel system are the Model 1601P 32 Mbit Bit Synchronizer cards. Each 1601P can be enhanced with a programmable logic module to provide an optional format synchronizer, a built-in bit error rate test (BERT) generator or support for unique decoding applications requiring non-standard codes or data formats. The logic module is reprogrammable and can be replaced in the field without any special tools, thus minimizing down time when a new application comes along. This upgradeability will allow you to respond quickly to evolving requirements such as:

• Recovering data from newly defined or application specific coding schemes

• Creating canned formats for recovering data from concatenated or layered codes

• Monitoring data streams for frame synchronization to resolve ambiguities or polarity inversions typical with many modulation schemes

*Due to rear panel limitations 2650P configurations exceeding 12 channels require selective I/O arrangements. The Model 2650P configured with 12 Bit Synchronizers allows the full collection of I/O’s. Click here for rear panel layout.

 

System Software

 

GUI Setup and Operation Status displays are accessed through a built-in color LCD display and keyboard. Each of the Model 1601Ps are controlled via a single interface with drop down menus for individual cards. The unit automatically recognizes all of the bit synchronizers as well as their features. Setup configurations can be stored and retrieved for all previous missions as a group or individually. A page lock command accessible via the GUI reminds users before executing new instructions in order to avoid mistakes during a live mission. Remote users can control the unit via the included Ethernet or RS-232 port. If two users are viewing the system simultaneously, both see the changes made in real time by either user.

 User Manual

 

 

Technical Specs

SYSTEM FUNCTIONS

Acroamatics Software Suite

Included

GUI Interface

Standard

Operating System

Windows 2000/XP

Configuration Storage

Limited only by disk space

Special Features

Lock out per bit synch, Auto-sensing configuration, Setups stored per system or mission. Remote GUI Display via Ethernet or RS-232

CHASSIS

Form Factor

Standard PCI

Available Slots

12

Processor

Pentium 4

DRAM

512MB to 2GB

Storage

500G HDD, DVD/CD-RW, FDD

Display

12” Flat Panel

Keyboard

Retractable, track ball

I/O Ports

4 USB Ports, 1 RS-232

Network

10/100 Ethernet

Power

Dual Hot-swappable Redundant 110/220v

Standard Outputs

Pre-configured 48 BNC’s

Standard Inputs

Pre-configured 96 BNC’s

SIGNAL INPUTS

Source

Program selectable: one of five inputs

Isolation

Greater than 60dB at 32MHz

Impedance

Program selectable: Hi-Z/Lo-Z. Single Ended: 4kΩ/75Ω, Differential: 10kΩ/150Ω

Signal Level

Single Ended: 0.2 to 30V p-p, Differential: 0.2 to 25V p-p

DC Offset

20V max Single-Ended, Hi-Z

Baseline Variation

Tracks sinusoidal offsets to 100% p-p signal amplitude at 0.1% bit rate

PCM Codes

 Program selectable: NRZ-L/M/S, Biø-L/M/S, DBiø-M/S, DM-M/S, MDM-M/S, RZ

Derandomizer

 Program selectable: RNRZ 9/11/15/17/23, forward/reverse

SYNCHRONIZATION

Bit Rate Range

8bps-32Mbps NRZ codes, 8bps-16Mbps all others

Tuning Resolution

0.1% of bit rate

Capture Range

3 times the programmed loopwidth, typical

Tracking Range

±12% typical, with programmable limiter

Loop Bandwidth

0.1% to 3.2%, program selectable in 0.1% increments

Sync Threshold

0dB for NRZ-L and Biø-L codes

Sync Maintenance

 (LW=0.1%) –2dB NRZ-L and Biø-L codes

Sync Acquisition

 (LW=1.6%, SNR > 12dB) Typically less than 32 bit periods

Sync Retention

(LW=0.1%, SNR > 3dB) Retains sync through > 128 consecutive dropouts

Bit Error Rate

(LW=0.1%) to within 1dB of ideal bit error rate performance curves

DATA/CLOCK OUTPUTS (TAPE & CODE OUTPUTS)

NRZ-L Data

One  TTL (Optional RS422)

Data Clock

One TTL (Optional RS422), program selectable: 0º, 90º, 180º, 270º

2x Clock

One TTL, program selectable: 1X/2X, normal/invert

Data Polarity

Program selectable: normal/inverted

SOFT BIT DECISION OUTPUT

Data/clock

Four bits Offset Binary plus 0º clock; TTL (open collector)

Sample Rate

Programmable to 20 megasamples per second

PCM ENCODER

Data Source

Program selectable: Recovered Data or External data, or Test generator

Outputs

One bipolar, 4V p-p; Two TTL

Randomizer

Program selectable: RNRZ 9/11/15/17/23

PCM Codes

Program selectable: NRZ-L/M/S, Biø-L/M/S, DBiø-M/S, DM-M/S, MDM-M/S, RZ

EXTERNAL DATA/CLOCK INPUT

Signal Type

Jumper Selectable: RS422 or TTL

Impedance

120Ω RS422, 75Ω TTL

Data Code

Program selectable: NRZ-L/M/S, Biø-L/M/S, DBiø-M/S, DM-M/S, MDM-M/S, RZ : up to 32Mhz NRZ codes, 16 Mhz all others

Data Clock

Program selectable: Normal/Inverted, 1x or 2x

CONVOLUTIONAL ENCODER/DECODER (OPTIONAL PER CARD)

Viterbi Decoder

Rate 1/2, k=7: includes differential decoding, V.35 descrambling, and G2 invert

Symbol Formats

serial, parallel, and staggered parallel

Convolutional Encoder

Rate 1/2, k=7: includes differential encoder, V.35 scrambler, and G2 inverter

Symbol Formats

serial, parallel, and staggered parallel

FORMAT GENERATOR/SYNCHRONIZER  (OPTIONAL PER CARD)

Format Generator

Programmable frame length, sync pattern and mask

Synchronizer Source

Program selectable: Recovered data, external data, or Test generator

Synchronizer Strategy

Pattern match in "search", programmable error limits for "check" and "lock" states

Other Features

Bit slip enable, auto polarity enable, data source/ambiguity resolution

BIT ERROR RATE TESTER (OPTIONAL PER CARD)

Transmitter Pattern

PRN sequence: 27-1, 29-1, 211-1, 215-1 (forward/reverse)

Pattern Generator Clock

Program selectable: Bit Rate Clock or External Clock

Blanking

Program selectable: 32, 64, 128 bits -synchronized to BER counter

BER Sample Period

Program selectable: 103 to 109 bit periods, or continuous accumulate

Other Features

Automatic pattern synchronization, forced error ON/OFF

PHYSICAL

Power

90-132V or 180-264V auto select, 50-60Hz, 4A max

Dimensions

12.25" (31.12cm) H x 19.0" (48.26cm) W x 20.19" (51.28cm) D

Temperature

Operating 0 to +40° C, Non-Operating -40 to +86° C

Relative Humidity

Up to 90% non-condensing

Shock

6G, Non-operating 50G

Vibration

Operating 0.5G, 5 to 2000 Hz, Non-operating 1.2G, 5 to 500 Hz

specifications subject to change without notice

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